Superconducting circuits are most prevalently used in large-scale quantum computing. Since superconductor materials have substantially no electrical resistance below a certain critical temperature, they provide increased performance in integrated circuit devices, which can be used in a variety of electronic devices.
To achieve the high computation speeds that meet the demands of higher functionality in integrated circuits while being pushed into smaller footprints, new packaging structures need to integrate more dies with greater function, higher I/O counts, and smaller die pad pitches. The current solutions for densifying packages are based upon materials selection, package design, and integration approach. This technology identifies material selection, package design, and integration approaches to minimize resistance for a superconducting path between two chips in a flip-chip configuration.
This technology is a cryogenic bit package comprised of quantum bit integrated circuits, a quantum bit bias control line, a superconducting multi-chip module, and superconducting interconnects to electrically couple the qubit circuits to the multi-chip modules. The interconnect structure is formed on a semiconductor structure with a resistive substrate and an interconnect pad, which together, allow for assembly of multi-layer semiconductor structures with multiple superconducting integrated circuits. This multi-layer semiconductor structure has a series of coupled interconnect sections that use superconducting qubit ICs to perform fast and nearly loss-less operations for quantum computer architectures. The interconnects of this system demonstrate minimal resistance in the superconducting path as well as efficient heat dissipation in the thermally conducting path.
- Stable interconnect with room temperature electronics.
- Increased I/O density for multi-qubit operations. Constitutive layer geometry supports long coherence times