Damage-proof Low Voltage Insulation
Described is an insulative layer for use in systems utilizing a high temperature superconductor (HTS). The insulative layer comprises a first layer of an insulative material, a second layer of an insulative material and a third layer of an electrically conductive material disposed the first and second layers. The electrically insulating material of the first layer and the electrically insulating material of the second layer are both resistant to grinding forces. The third layer is provided from a material having a resistance to oxidative degradation, weather, and radiation, as well as resistance to abrasive and fictional wear at cryogenic temperatures. In one application, the insulative layer may be disposed at an interface between a toroidal field (TF) coil and a central solenoid (CS) of a high temperature superconducting magnet.
Researchers
-
low voltage insulation for high-temperature superconducting magnets
Japan | Pending -
low voltage insulation for high-temperature superconducting magnets
European Patent Convention | Pending -
low voltage insulation for high-temperature superconducting magnets
Canada | Pending -
low voltage insulation for high-temperature superconducting magnets
Korea (south) | Pending -
low voltage insulation for high-temperature superconducting magnets
India | Pending -
low voltage insulation for high-temperature superconducting magnets
United States of America | Pending
Sign up for technology updates
Sign up now to receive the latest updates on cutting-edge technologies and innovations.