Reducing Serial I/O Power in Error-Tolerant Applications by Efficient Lossy Encoding


The Inventors introduce value-deviation-bounded serial (VDBS) encoding that significantly reduces signal transitions between bits of a single serialized word, trading power efficiency for data accuracy. This tradeoff is worthwhile when the data are from signal sources such as sensors and destined for consumption by signal processing algorithms that are error tolerant. This technology can be used to develop wearable, embedded and mobile processing platforms.

Problem Addressed

Wearable computing platforms such as health-tracking and head-mounted systems present new challenges to energy-efficient design. The processors in these platforms are connected to many sensor integrated circuits (ICs) and the data transfer between ICs is usually the main focus of the power-reduction efforts. Because the power-efficiency for inter-IC communication is limited by printed circuit board properties, it has not scaled with advantages in semiconductor technology. Efforts to-date at reducing the inter-IC communication cost are targeted toward parallel busses, and not bit-serial communication links that are used in many embedded computing platforms. The Inventors have come up with a VDBS encoding technique that reduce signal transitions and thereby reduce dynamic power dissipation on bit-serial communication interfaces. 


The Inventors present Rake, an efficient algorithm for VDBS encoding. Rake reduces signal transitions and thereby reduces dynamic power dissipation on serial communication interfaces, by permitting a selectable amount of deviation from correctness in transmitted data with small overheads in practical applications.

It operates in two sweeps of a word, accumulating metadata in the first sweep and leveling out transitions in the second (hence the name, “Rake”). In the first phase, moving across the l-bit input words from least-significant bit (LSB) to most-significant bit (MSB), Rake stores the number of transitions seen-to-date in the transition count register. Rake stores the indices of these transitions in the transition indices array. In the second phase, Rake moves across the input in the opposite direction, from MSB to LSB, inspecting only the bit positions that have transitions. The algorithm performs checks to determine which transitions can be removed based on allowable deviations from correctness that might occur, and performs these changes. Rake is a highly efficient algorithm: for 24-bit values, it requires only 45 steps, as opposed to exact, optimal solutions that require exploring a space of 16 million values.


  • Rake’s execution time is linear in the word size of the value it encodes for a highly effective and efficient algorithm
  • When evaluated by encoding data in a pedometer system and in a text-recognition system, Rake reduced transitions by 54% on average, in exchange for step count errors smaller than 5% in the pedometer system. For the text recognizer, Rake reduced transitions by 55% on average, while maintaining accuracy above 90%