Physical-Layer Quantum Error Suppression for Superconducting Qubits in Gate Model Quantum Computation Applications
A device combines physical qubits into a logical qubit according to a passive, quantum error-suppressing code, and weaves logical qubits into a fabric for performing computation or annealing according to an active, quantum error-correcting code. By using enough physical qubits in each logical qubit, the error suppression can overcome errors introduced by ambient noise, such as thermal fluctuations. However, interactions between individual logical qubits are based on interactions between multiple physical qubits, such as XX or ZZ interactions, so logical interactions require intermediary circuitry capable of coupling four or more spins-this circuitry also is described, wherein coupling an ancilla qubit to such intermediary circuitry allows the formation of a logical qubit having passive error suppression, and arbitrary computations can be performed using a fabric of such circuitry. Concatenating the active and passive codes does not increase circuit complexity, or reduce the speed of gate operations.
Researchers
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physical-layer quantum error suppression for superconducting qubits in quantum computation and optimization
United States of America | Granted | 10,942,804 -
physical-layer quantum error suppression for superconducting qubits in quantum computation and optimization
Patent Cooperation Treaty | Published application
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