New Structure and Process Technology for High Linearity in GaN Transistors

Exclusively Licensed

A field effect transistor that has a source, a drain, a gate and a semiconductor region. The semiconductor region has a source access region between the gate and the source, a drain access region between the gate and the drain, and a channel region under the gate. The channel region under the gate has a maximum current-carrying capability that is lower than a maximum current-carrying capability of the source access region.

Researchers

Tomas Palacios / Dong Lee

Departments: Dept of Electrical Engineering & Computer Science
Technology Areas: Chemicals & Materials: Nanotechnology & Nanomaterials / Electronics & Photonics: Semiconductors

  • improving linearity in semiconductor devices
    United States of America | Granted | 9,711,594

License this technology

Interested in this technology? Connect with our experienced licensing team to initiate the process.

Sign up for technology updates

Sign up now to receive the latest updates on cutting-edge technologies and innovations.