GaN Circuits with Higher RF Linearity
A semiconductor device having relatively linear and constant parasitic capacitance of an operation range includes a first component having a negatively charged carrier channel and a second component comprising a positively charged carrier channel. The first component has source terminal and a drain terminal. The second component has bias terminal. Both components share a gate terminal that is electrostatically coupled to the negatively charged carrier channel of the first component and the positively charged carrier channel of the second component to produce a capacitance profile that stays relatively linear and constant as a voltage at the gate terminal changes.
Researchers
-
semiconductor device with linear parasitic capacitance
United States of America | Published application
License this technology
Interested in this technology? Connect with our experienced licensing team to initiate the process.
Sign up for technology updates
Sign up now to receive the latest updates on cutting-edge technologies and innovations.