CMOS Readout Circuit Architecture for Large-Format Small-Pixel Photon Counting Focal Plane Arrays Using Geiger-Mode Avalanche Photodiodes
Embodiments of the present invention include complementary metal-oxide-semiconductor (CMOS) readout architectures for photon-counting arrays with a photon-counting detector, a digital counter, and an overflow bit in each of the sensing elements in the array. Typically, the photon-counting detector is a Geiger-mode avalanche photodiode (APD) that emits brief pulses every time it detects a photon. The pulse increments the digital counters, which, in turn, sets the overflow bit once it reaches a given count. A rolling readout system operably coupled to each sensing element polls the overflow bit, and, if the overflow bit is high, initiates a data transfer from the overflow bit to a frame store. Compared to other photo-counting imagers, photon-counting imagers with counters and overflow bits operate with decreased transfer bandwidth, high dynamic range, and fine spatial resolution.
Researchers
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cmos readout architecture and method for photon-counting arrays
United States of America | Granted | 8,426,797
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