Process for Creating Novel Monolithic Circuits with New Materials

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A method includes attaching a partially processed CMOS wafer to a second wafer to produce a combined wafer. The second wafer comprises a first region including a material different from silicon. The method also includes forming devices in the first region or in a second region of the combined wafer having a material different from silicon.

Researchers

Departments: Department of Materials Science and Engineering
Technology Areas: Chemicals & Materials: Composites, Nanotechnology & Nanomaterials / Electronics & Photonics: Semiconductors / Industrial Engineering & Automation: Manufacturing & Equipment

  • monolithic integration of cmos and non-silicon devices
    United Kingdom | Granted | 2,834,850
  • monolithic integration of cmos and non-silicon devices
    Korea (south) | Granted | 10
  • monolithic integration of cmos and non-silicon devices
    United States of America | Granted | 9,530,763
  • monolithic integration of cmos and non-silicon devices
    European Patent Convention | Granted | 2,834,850
  • monolithic integration of cmos and non-silicon devices
    Japan | Granted | 6,060,252
  • monolithic integration of cmos and non-silicon devices
    Germany | Granted | 2,834,850
  • monolithic integration of cmos and non-silicon devices
    France | Granted | 2,834,850

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