DREAM: Designing Resilience Against Metallic CNTs

Non-Exclusively Licensed

System and methods to generate a circuit design for an integrated circuit using only allowable pairs of connected logic stages. The allowable pairs of connected logic stages are those pairs of connected logic stages with a static noise margin (SNM) above an SNM threshold. Also presented is a 16-bit microprocessor made entirely from carbon nanotube field effect transistors (CNFET) having such allowable pair of connected logic stages.

Researchers

Max Shulaker / Gage Hills

Technology Areas: Chemicals & Materials: Nanotechnology & Nanomaterials / Electronics & Photonics: Semiconductors

  • systems and methods for designing integrated circuits
    United States of America | Granted | 11,790,141
  • systems and methods for designing integrated circuits
    United States of America | Granted | 11,062,067
  • systems and methods for designing integrated circuits
    China | Granted | 0

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