Header and Body 3


This technology is a cryogenic bit package comprised of quantum bit integrated circuits, a quantum bit bias control line, a superconducting multi-chip module, and superconducting interconnects to electrically couple the qubit circuits to the multi-chip modules. The interconnect structure is formed on a semiconductor structure with a resistive substrate and an interconnect pad, which together, allow for assembly of multi-layer semiconductor structures with multiple superconducting integrated circuits. This multi-layer semiconductor structure has a series of coupled interconnect sections that use superconducting qubit ICs to perform fast and nearly loss-less operations for quantum computer architectures. The interconnects of this system demonstrate minimal resistance in the superconducting path as well as efficient heat dissipation in the thermally conducting path.