Today’s military and commercial electronics demand increased density, enhanced mobility, and extended operational life. In addition, new electronic packages require low loss, lightweight structures, higher electrical performance, and mixed material construction with the structural stability to accommodate the complexity associated with size, weight and power optimization. This requires the integration of multiple interconnected structures, yielding die with greater function, higher I/O counts and smaller pitches. While it is desirable to reduce interconnect pitch, relatively simple and cost effective approaches are needed in order for such a technology to be practical. Current conventional interconnects, such as solder pads, self-aligned contact pads, bond wires, and conductive pads, are bulky and their associated pitch is not easily reduced. This results in a less effective use of the space on the integrated circuit and a less powerful circuit overall.